Simplified Josephson-junction fabrication process for reproducibly high-performance superconducting qubits

We introduce a simplified fabrication technique for Josephson junctions and demonstrate superconducting Xmon qubits with $T_1$ relaxation times averaging above 50$~\mu$s ($Q>$1.5$\times$ 10$^6$). Current shadow-evaporation techniques aluminum-based require separate lithography step to deposit patch that makes galvanic, connection between the junction electrodes circuit wiring layer. The eliminates parasitic junctions, which otherwise contribute significantly dielectric loss. In our patch-integrated cross-type (PICT) technique, we use one vacuum cycle evaporate both patch. study of more than 3600 show an average resistance variation 3.7$\%$ on wafer contains forty 0.5$\times$0.5-cm$^2$ chips, areas ranging 0.01 0.16 $\mu$m$^2$. on-chip spread in is 2.7$\%$, 20 chips varying 1.4 2$\%$. For sizes used transmon qubits, deduce wafer-level transition-frequency 1.7-2.5$\%$. 60-70$\%$ this attributed junction-area fluctuations, while rest caused by tunnel-junction inhomogeneity. Such high frequency predictability requirement scaling-up number quantum computer.